The present disclosure relates to an imaging element, a drive method for an imaging element, a manufacturing method for an imaging element, and an electronic apparatus. More particularly, the disclosure relates to an imaging element that implements an imaging operation to obtain high-quality images, a drive method for the imaging element, a manufacturing method for the imaging element, and an electronic apparatus.
Hitherto, in solid-state imaging elements (image sensors) using a semiconductor, as photoelectric conversion elements that convert received light into an electric signal, photodiodes (PDs), which are photoelectric transducers utilizing a semiconductor pn junction, are used. Elements using PDs are installed in many devices, such as digital cameras, video cameras, monitor cameras, copying machines, and fax machines. These days, as solid-state imaging elements, so-called complementary metal oxide semiconductor (CMOS) solid-state imaging elements, which are manufactured by a CMOS process, together with peripheral circuits, are widely used.
For example, in a solid-state imaging element, electric charge generated as a result of performing photoelectric conversion in a PD included in a pixel is transferred to a floating diffusion (FD), which is a floating diffusion area. Then, by measuring a potential of the FD, a signal representing a voltage corresponding to the electric charge in the PD is extracted.
This will be described more specifically below with reference to FIG. 1. FIG. 1 illustrates a pixel 11. In the pixel 11, electric charge generated in a PD 12 is transferred to an FD 14 as a result of driving a transfer transistor 13, and is stored in a capacitor 15 included in the FD 14. The electric charge stored in the FD 14 is then converted into a voltage by an amplifier transistor 16, and is then output to a vertical signal line as a result of driving a selection transistor 17. The vertical signal line is connected to a transistor (constant current source) which is biased at a constant voltage, and this transistor and the amplifier transistor 16 form a so-called source-follower circuit. Meanwhile, electric charge stored in the FD 14 is discharged to a constant voltage source VDD as a result of driving a reset transistor 18.
In a solid-state imaging element in which the pixels 11 configured as described above are arranged in a matrix form on a semiconductor substrate, the output voltage (conversion efficiency) per unit electron is determined from the total of the capacitance components of the FD 14 in which electric charge is stored and the modulation factor of the source follower circuit. The total of the capacitance components of the FD 14 in which electric charge is stored is found by adding the capacitance of the capacitor 15 to the capacitance generated by each transistor connected to the FD 14.
In solid-state imaging elements of the related art, the capacitance of the FD 14 is fixed, and the dynamic range or the output voltage when illuminance is low is not changed. Accordingly, Japanese Unexamined Patent Application Publication No. 2008-205638 discloses a solid-state imaging element including pixels that are capable of changing the capacitance of the FD 14 in order to dynamically change the dynamic range or the output voltage when illuminance is low.
FIG. 2 schematically illustrates a planar structure of a pixel 11′ that is capable of changing the capacitance of an FD 14′ in which electric charge is stored.
The pixel 11′ is configured as follows. A PD 12 is connected to the FD 14′ via a transfer transistor 13, and the FD 14′ is connected to the gate electrode of an amplifier transistor 16. A selection transistor 17 is disposed on one side of the amplifier transistor 16, and a reset transistor 18 is disposed on the other side of the amplifier transistor 16. In the pixel 11′, a switching element 19 is disposed in the FD 14′ between the transfer transistor 13 and the reset transistor 18. With this configuration, the FD 14′ is able to store electric charge therein by using the capacitor 15 included in the FD 14′ and an additional capacitor 15′ connected to the FD 14′ via the switching element 19.
In the pixel 11′ configured as described above, driving of the switching element 19 is controlled such that electric charge generated in the PD 12 is stored in the capacitor 15 when illuminance is low, and is stored in the capacitor 15 and in the additional capacitor 15′ when illuminance is high. In this manner, the total capacitance components of the FD 14′ in which electric charge is stored are dynamically changed by using the switching element 19, thereby implementing a high dynamic range in the pixel 11′.
In CMOS solid-state imaging elements of the related art, pixel signals are sequentially read in turn from individual rows, which causes distortion in images. Accordingly, in order to reduce the generation of distortion in images, a technology, called “global shutter”, for simultaneously transferring electric charge in all PDs included in a solid-state imaging element has been developed.
For example, Japanese Unexamined Patent Application Publication No. 2011-119950 discloses a solid-state imaging device that implements a global shutter by using a thin-film transistor disposed in a wiring layer. Non-patent literature “Electronic Global Shutter CMOS Image Sensor using Oxide Semiconductor FET with Extremely Low Off-state Current”, Aoki et al., Symp. On VLSI Technology 2011, p. 174, 2011 also discloses a CMOS image sensor in which a thin-film transistor is disposed in a wiring layer.